ASIC wafer

More ASIC Delays From Butterfly Labs

It’s no secret which side of the Butterfly Labs love/hate fence I fall – I think they’re great guys who make good products. I talk to Sonny and Josh pretty regularly and eagerly await the release of their ASIC product line, but even I have to call a duck a duck: BFL is terrible with timelines.

There is a vocal minority who I think go a step too far in claiming that BFL is entirely a scam, has no product and is just going to take our money and run. I think these people are perhaps a bit crazy or at least have too much time on their hands, but I can sort of understand the origins of their madness.

Last night, BFL’s Josh Zerlan posted that they were experiencing yet another delay, this time at the bumping facility. The TL;DR version of the post is that they’ve lost a fair amount of time because of this delay and are trying hard to make up for lost time in other areas. They now expect the first units to ship a week from Friday (that is, March 8th) although Josh cautions that even this new estimate is subject to change. There were also some pretty pictures of uncut ASIC wafers.

I expect this latest delay will stir up a new round of anti-BFL zealotry but at this point I really don’t care any more. The vocal minority will keep being vocal and despite all the time and “evidence” BFL has handed them, continues to be a minority. As a veteran of the FPGA shipping fiasco I have faith that BFL will ship, but I’m also aware that no estimate is ever correct for your first time doing something. ASICs are a very different product with a very different procedure from FPGAs and there were bound to be some delays.

Unfortunately there were a lot more delays than BFL had accounted for and even they admit that their customers have every right to be upset, but I’m usually the type to look for a silver lining and hey, at least we’re getting lots of good pictures along the way.

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